#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "STM32 F1 configuration"

if ARCH_CHIP_STM32F1

choice
	prompt "STM32F1 Chip Selection"
	default ARCH_CHIP_STM32F103ZE
	depends on ARCH_CHIP_STM32F1

config ARCH_CHIP_STM32F100C8
	bool "STM32F100C8"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100CB
	bool "STM32F100CB"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100R8
	bool "STM32F100R8"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100RB
	bool "STM32F100RB"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100RC
	bool "STM32F100RC"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100RD
	bool "STM32F100RD"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100RE
	bool "STM32F100RE"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100V8
	bool "STM32F100V8"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100VB
	bool "STM32F100VB"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100VC
	bool "STM32F100VC"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100VD
	bool "STM32F100VD"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F100VE
	bool "STM32F100VE"
	select STM32_STM32F10XX
	select STM32F1_VALUELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F102CB
	bool "STM32F102CB"
	select STM32_STM32F10XX
	select STM32F1_USBACCESSLINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103T8
	bool "STM32F103T8"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103TB
	bool "STM32F103TB"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103C4
	bool "STM32F103C4"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_LOWDENSITY

config ARCH_CHIP_STM32F103C8
	bool "STM32F103C8"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103CB
	bool "STM32F103CB"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103R8
	bool "STM32F103R8"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103RB
	bool "STM32F103RB"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103RC
	bool "STM32F103RC"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103RD
	bool "STM32F103RD"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103RE
	bool "STM32F103RE"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103RG
	bool "STM32F103RG"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103V8
	bool "STM32F103V8"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103VB
	bool "STM32F103VB"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_MEDIUMDENSITY
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103VC
	bool "STM32F103VC"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103VE
	bool "STM32F103VE"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F103ZE
	bool "STM32F103ZE"
	select STM32_STM32F10XX
	select STM32F1_PERFORMANCELINE
	select STM32F1_HIGHDENSITY
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F105VB
	bool "STM32F105VBT7"
	select STM32_STM32F10XX
	select STM32F1_CONNECTIVITYLINE
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F105RB
	bool "STM32F105RB"
	select STM32_STM32F10XX
	select STM32F1_CONNECTIVITYLINE
	select STM32_HAVE_DAC1
	select STM32_HAVE_I2C2
	select STM32_HAVE_TIM4

config ARCH_CHIP_STM32F107VC
	bool "STM32F107VC"
	select STM32_STM32F10XX
	select STM32F1_CONNECTIVITYLINE
	select STM32_HAVE_DAC1
	select STM32_HAVE_TIM4

endchoice

endif

config STM32_STM32F10XX
	bool
	default n
	select STM32_HAVE_DMA1
	select STM32_HAVE_DMA2 if !STM32F1_VALUELINE || STM32F1_HIGHDENSITY
	select ARCH_CORTEXM3
	select STM32_HAVE_I2C1
	select STM32_HAVE_SPI1
	select STM32_HAVE_SYSCFG if STM32F1_CONNECTIVITYLINE
	select STM32_HAVE_USART1
	select STM32_HAVE_USART2
	select STM32_HAVE_SPI2 if STM32F1_HIGHDENSITY || STM32F1_MEDIUMDENSITY
	select STM32_HAVE_SPI3 if STM32F1_HIGHDENSITY || STM32F1_MEDIUMDENSITY
	select STM32_HAVE_RTC_COUNTER
	select STM32_HAVE_RTC
	select STM32_HAVE_CRC
	select STM32_HAVE_PWR
	select STM32_HAVE_BKP
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM3
	select STM32_HAVE_IP_AES_M3M4_V1 if STM32_HAVE_AES
	select STM32_HAVE_IP_BBSRAM_M3M4_V1
	select STM32_HAVE_IP_BKP_M3M4_V1
	select STM32_HAVE_IP_CAN_BXCAN_M3M4_V1
	select STM32_HAVE_IP_CCM_M3M4_V1 if STM32_HAVE_CCM
	select STM32_HAVE_IP_CRYPTO_M3M4_V1
	select STM32_HAVE_IP_DBGMCU_M3M4_V1
	select STM32_HAVE_IP_ADC_M3M4_V1_BASIC
	select STM32_HAVE_COMMON_FOC
	select STM32_HAVE_IP_DCMI_V1
	select STM32_HAVE_IP_DAC_M3M4_V1
	select STM32_HAVE_IP_DFUMODE_M3M4_V1
	select STM32_HAVE_IP_DMA_V1
	select STM32_HAVE_IP_DMA_V1_8CH
	select STM32_HAVE_ETHERNET if STM32_HAVE_ETHMAC
	select STM32_HAVE_IP_EXTI_V1
	select STM32_HAVE_IP_ETHMAC_M3M4_V1 if STM32_HAVE_ETHMAC
	select STM32_HAVE_IP_FLASH_M3M4_V1
	select STM32_HAVE_IP_FLASH_M3M4_F1F3
	select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC
	select STM32_HAVE_IP_FREERUN_M3M4_V1
	select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC
	select STM32_HAVE_IP_GPIO_M3M4_V1
	select STM32_HAVE_IP_I2C_M3M4_V1
	select STM32_HAVE_IP_I2S_M3M4_V1
	select STM32_HAVE_IP_ONESHOT_M3M4_V1
	select STM32_HAVE_IP_PWR_M3M4_V1
	select STM32_HAVE_IP_RTC_COUNTER_M3M4_V1
	select STM32_HAVE_IP_RTC_M3M4_V1
	select STM32_HAVE_IP_SDIO_M3M4_V1 if !STM32F1_CONNECTIVITYLINE && !STM32F1_VALUELINE
	select STM32_HAVE_IP_SPI_V1
	select STM32_HAVE_IP_SYSCFG_M3M4_V1
	select STM32_HAVE_IP_TIMERS_M3M4_V1
	select STM32_HAVE_IP_USART_V1
	select STM32_HAVE_IP_USBDEV_M3M4_V1 if STM32_HAVE_USBDEV
	select STM32_HAVE_IP_USBFS_M3M4_V1 if STM32_HAVE_USBFS
	select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS
	select STM32_HAVE_IP_WDG_M3M4_V1

config STM32F1_VALUELINE
	bool
	default n
	select STM32_VALUELINE
	select STM32_HAVE_CEC
	select STM32_HAVE_USART3
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM12
	select STM32_HAVE_TIM13
	select STM32_HAVE_TIM14
	select STM32_HAVE_TIM15
	select STM32_HAVE_TIM16
	select STM32_HAVE_TIM17
	select STM32_HAVE_SPI2 if STM32F1_HIGHDENSITY
	select STM32_HAVE_SPI3 if STM32F1_HIGHDENSITY

config STM32F1_CONNECTIVITYLINE
	bool
	default n
	select STM32_CONNECTIVITYLINE
	select STM32_HAVE_OTGFS
	select STM32_HAVE_USART3
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_ADC2
	select STM32_HAVE_CAN1
	select STM32_HAVE_CAN2
	select STM32_HAVE_ETHMAC
	select STM32_HAVE_SPI2
	select STM32_HAVE_SPI3

config STM32F1_PERFORMANCELINE
	bool
	default n
	select STM32_HAVE_USBDEV
	select STM32_HAVE_USART3
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_ADC2
	select STM32_HAVE_CAN1

config STM32F1_USBACCESSLINE
	bool
	default n
	select STM32_HAVE_USBDEV
	select STM32_HAVE_FSMC
	select STM32_HAVE_USART3
	select STM32_HAVE_SPI2

config STM32F1_MEDIUMPLUSDENSITY
	bool
	default n

config STM32F1_HIGHDENSITY
	bool
	default n
	select STM32_HIGHDENSITY
	select STM32_HAVE_FSMC
	select STM32_HAVE_USART3
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_ADC2
	select STM32_HAVE_ADC3
	select STM32_HAVE_CAN1

config STM32F1_MEDIUMDENSITY
	bool
	default n
	select STM32_MEDIUMDENSITY
	select STM32_HAVE_USART3
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_ADC2
	select STM32_HAVE_ADC3
	select STM32_HAVE_CAN1

config STM32F1_LOWDENSITY
	bool
	default n
	select STM32_LOWDENSITY
	select STM32_HAVE_USART3
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_ADC2
	select STM32_HAVE_CAN1 if !STM32F1_VALUELINE

# Compatibility symbols kept private to STM32F1 selection. Existing driver
# code still keys off these historical names.

config STM32_VALUELINE
	bool

config STM32_CONNECTIVITYLINE
	bool

config STM32_HIGHDENSITY
	bool

config STM32_MEDIUMDENSITY
	bool

config STM32_LOWDENSITY
	bool

source "arch/arm/src/stm32f1/Kconfig.pinmap"
