#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#

if ARCH_CHIP_STM32H7

comment "STM32 H7 Configuration Options"

config STM32_H7_PERIPHERALS
	bool
	default ARCH_CHIP_STM32H7
	select STM32_HAVE_DMA1
	select STM32_HAVE_DMA2
	select STM32_HAVE_I2C1
	select STM32_HAVE_I2C2
	select STM32_HAVE_I2C3
	select STM32_HAVE_I2C4
	select STM32_HAVE_IOCOMPENSATION
	select STM32_HAVE_LPTIM1
	select STM32_HAVE_LPTIM3
	select STM32_HAVE_LPTIM4
	select STM32_HAVE_OTGFS
	select STM32_HAVE_RTC_SUBSECONDS
	select STM32_HAVE_RTC_MAGIC
	select STM32_HAVE_RTC
	select STM32_HAVE_CRC
	select STM32_HAVE_PWR
	select STM32_HAVE_BKPSRAM
	select STM32_HAVE_SDMMC1
	select STM32_HAVE_SDMMC2
	select STM32_HAVE_SPI1
	select STM32_HAVE_SPI2
	select STM32_HAVE_SPI3
	select STM32_HAVE_SYSCFG
	select STM32_HAVE_UART4
	select STM32_HAVE_UART5
	select STM32_HAVE_UART7
	select STM32_HAVE_UART8
	select STM32_HAVE_USART1
	select STM32_HAVE_USART2
	select STM32_HAVE_USART3
	select STM32_HAVE_USART6
	select STM32_HAVE_HSEM
	select STM32_HAVE_CSI
	select STM32_HAVE_HSI48
	select STM32_HAVE_MDMA
	select STM32_HAVE_BDMA
	select STM32_HAVE_OTG_H7
	select STM32_HAVE_OTGHS
	select STM32_HAVE_USART_RXFIFO_THRESHOLD
	select STM32_HAVE_FDCAN_H7
	select STM32_HAVE_IP_WDG_M3M4_V1

choice
	prompt "STM32 H7 Chip Selection"
	default ARCH_CHIP_STM32H743ZI
	depends on ARCH_CHIP_STM32H7

config ARCH_CHIP_STM32H723VG
	bool "STM32H723VG"
	select STM32_STM32H7X3XX
	select STM32_STM32H72XXX_OR_STM32H73XXX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_V
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_FDCAN3
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 564K Kb SRAM,
		LQFP144

config ARCH_CHIP_STM32H723ZG
	bool "STM32H723ZG"
	select STM32_STM32H7X3XX
	select STM32_STM32H72XXX_OR_STM32H73XXX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_Z
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_FDCAN3
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 564K Kb SRAM,
		LQFP144

config ARCH_CHIP_STM32H743AG
	bool "STM32H743AG"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_A
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM,
		UFBGA169

config ARCH_CHIP_STM32H743AI
	bool "STM32H743AI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_A
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		UFBGA169

config ARCH_CHIP_STM32H743BG
	bool "STM32H743BG"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_B
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP208

config ARCH_CHIP_STM32H743BI
	bool "STM32H743BI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_B
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP208

config ARCH_CHIP_STM32H743IG
	bool "STM32H743IG"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_I
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP176 or UFBGA176

config ARCH_CHIP_STM32H743II
	bool "STM32H743II"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_I
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP176 or UFBGA176

config ARCH_CHIP_STM32H743VG
	bool "STM32H743VG"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_V
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP100 or TFBGA100

config ARCH_CHIP_STM32H743VI
	bool "STM32H743VI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_V
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP100 or TFBGA100

config ARCH_CHIP_STM32H743XG
	bool "STM32H743XG"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_X
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM,
		TFBGA240

config ARCH_CHIP_STM32H743XI
	bool "STM32H743XI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_X
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		TFBGA240

config ARCH_CHIP_STM32H743ZG
	bool "STM32H743ZG"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_Z
	---help---
		STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP144

config ARCH_CHIP_STM32H743ZI
	bool "STM32H743ZI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_Z
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP144

config ARCH_CHIP_STM32H745BG
	bool "STM32H745BG"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_B
	---help---
		Dual core STM32 H7 Cortex M7+M4, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP208

config ARCH_CHIP_STM32H745BI
	bool "STM32H745BI"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_B
	---help---
		Dual core STM32 H7 Cortex M7+M4, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP208

config ARCH_CHIP_STM32H745IG
	bool "STM32H745IG"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_I
	---help---
		Dual core STM32 H7 Cortex M7+M4, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP176 or UFBGA176

config ARCH_CHIP_STM32H745II
	bool "STM32H745II"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_I
	---help---
		Dual core STM32 H7 Cortex M7+M4, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP176 or UFBGA176

config ARCH_CHIP_STM32H745XG
	bool "STM32H745XG"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_X
	---help---
		Dual core STM32 H7 Cortex M7+M4, 1024 Kb FLASH, 1024K Kb SRAM,
		TFBGA240

config ARCH_CHIP_STM32H745XI
	bool "STM32H745XI"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_X
	---help---
		Dual core STM32 H7 Cortex M7+M4, 2048 Kb FLASH, 1024K Kb SRAM,
		TFBGA240

config ARCH_CHIP_STM32H745ZG
	bool "STM32H745ZG"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_G
	select STM32H7_IO_CONFIG_Z
	---help---
		Dual core STM32 H7 Cortex M7+M4, 1024 Kb FLASH, 1024K Kb SRAM,
		LQFP144

config ARCH_CHIP_STM32H745ZI
	bool "STM32H745ZI"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_Z
	---help---
		Dual core STM32 H7 Cortex M7+M4, 2048 Kb FLASH, 1024K Kb SRAM,
		LQFP144

config ARCH_CHIP_STM32H747XI
	bool "STM32H747XI"
	select STM32_STM32H7X7XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_X
	select STM32_HAVE_SMPS
	---help---
		Dual core STM32 H7 Cortex M7+M4, 2048 Kb FLASH, 1024K Kb SRAM
		TFBGA240

config ARCH_CHIP_STM32H750VB
	bool "STM32H750VB"
	select STM32_STM32H7X0XX
	select STM32_FLASH_CONFIG_B
	select STM32H7_IO_CONFIG_V
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7+M4, 128 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP100

config ARCH_CHIP_STM32H750ZB
	bool "STM32H750ZB"
	select STM32_STM32H7X0XX
	select STM32_FLASH_CONFIG_B
	select STM32H7_IO_CONFIG_Z
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7+M4, 128 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP144

config ARCH_CHIP_STM32H750IB
	bool "STM32H750IB"
	select STM32_STM32H7X0XX
	select STM32_FLASH_CONFIG_B
	select STM32H7_IO_CONFIG_I
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7+M4, 128 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP176 or UFBGA176+25

config ARCH_CHIP_STM32H750XB
	bool "STM32H750XB"
	select STM32_STM32H7X0XX
	select STM32_FLASH_CONFIG_B
	select STM32H7_IO_CONFIG_X
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7+M4, 128 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, TFBGA240+25

config ARCH_CHIP_STM32H753AI
	bool "STM32H753AI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_A
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, UFBGA169

config ARCH_CHIP_STM32H753BI
	bool "STM32H753BI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_B
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP208

config ARCH_CHIP_STM32H753II
	bool "STM32H753II"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_I
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP176/UFBGA176

config ARCH_CHIP_STM32H753VI
	bool "STM32H753VI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_V
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP100/TFBGA100

config ARCH_CHIP_STM32H753XI
	bool "STM32H753XI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_X
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, TFBGA240

config ARCH_CHIP_STM32H753ZI
	bool "STM32H753ZI"
	select STM32_STM32H7X3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_Z
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP144

config ARCH_CHIP_STM32H7B3LI
	bool "STM32H7B3LI"
	select STM32_STM32H7B3XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_L
	select STM32_HAVE_SMPS
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1376 Kb SRAM,
		with cryptographic accelerator, TFBGA225

config ARCH_CHIP_STM32H755II
	bool "STM32H755II"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_I
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, LQFP176/UFBGA176

config ARCH_CHIP_STM32H755XI
	bool "STM32H755XI"
	select STM32_STM32H7X5XX
	select STM32_FLASH_CONFIG_I
	select STM32H7_IO_CONFIG_X
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_CRYP
	select STM32_HAVE_IP_CRYPTO_H7
	---help---
		STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM,
		with cryptographic accelerator, TFBGA240

endchoice # STM32 H7 Chip Selection

config STM32_PWR_DIRECT_SMPS_SUPPLY
	bool "Use direct SMPS supply mode"
	depends on STM32_HAVE_SMPS
	default n

config STM32_PWR_EXTERNAL_SOURCE_SUPPLY
	bool "Use external source as power supply"
	default n
	---help---
		Select this option for using an external power supply connected directly to the VCAP pin.

choice
	prompt "STM32 H7 Power Supply Selection"
	default STM32_PWR_DEFAULT_SUPPLY
	depends on STM32_HAVE_SMPS && !STM32_HAVE_PWR_DIRECT_SMPS_SUPPLY
	---help---
		The STM32H7x5 and STM32H7x7 support power supply configurations for the VCORE core domain and an external supply,
		by configuring the SMPS step-down converter and voltage regulator.
		Note:The SMPS step-down converter is not available on all packages.

		Currently the only supported modes are Direct SMPS supply and LDO supply.

config STM32_PWR_DEFAULT_SUPPLY
	bool "Default"

config STM32_PWR_LDO_SUPPLY
	bool "Use LDO supply mode"

endchoice # "STM32 H7 Power Supply Selection"

config STM32_PWR_IGNORE_ACTVOSRDY
	bool "Ignore PWR_CSR1_ACTVOSRDY bit"
	default n
	---help---
		This option disable busy wait for PWR_CSR1_ACTVOSRDY during boot.
		This is workaround for Renode simulation that doesn't implement this feature.

config STM32H7_IO_CONFIG_A
	# Package designator A
	bool
	default n

config STM32H7_IO_CONFIG_B
	# Package designator B
	bool
	default n

config STM32H7_IO_CONFIG_I
	# Package designator I
	bool
	default n

config STM32H7_IO_CONFIG_L
	# Package designator L
	bool
	default n

config STM32H7_IO_CONFIG_V
	# Package designator V
	bool
	default n

config STM32H7_IO_CONFIG_X
	# Package designator X
	bool
	default n

config STM32H7_IO_CONFIG_Z
	# Package designator Z
	bool
	default n

config ARCH_STM32H7_DUALCORE
	bool
	default n
	select STM32_HSEM if !STM32_CORTEXM4_DISABLED
	select STM32_HAVE_CM4

choice
	prompt "STM32 H7 Core selection"
	default ARCH_CHIP_STM32H7_CORTEXM7

config ARCH_CHIP_STM32H7_CORTEXM7
	bool "STM32H7 Cortex-M7 core"
	select ARCH_CORTEXM7
	select ARMV7M_HAVE_ICACHE
	select ARMV7M_HAVE_DCACHE
	select ARMV7M_HAVE_ITCM
	select ARMV7M_HAVE_DTCM

config ARCH_CHIP_STM32H7_CORTEXM4
	bool "STM32H7 Cortex-M4 core"
	depends on ARCH_STM32H7_DUALCORE
	select ARCH_CORTEXM4

endchoice # STM32 H7 Core selection

config STM32_STM32H7X0XX
	bool
	default n
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM3
	select STM32_HAVE_TIM4
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_TIM12
	select STM32_HAVE_TIM13
	select STM32_HAVE_TIM14
	select STM32_HAVE_TIM15
	select STM32_HAVE_TIM16
	select STM32_HAVE_TIM17
	select STM32_HAVE_LTDC
	select STM32_HAVE_ETHERNET
	select STM32_HAVE_FMC
	select STM32_HAVE_GPIOF if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_GPIOG if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI4
	select STM32_HAVE_SPI5 if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI6
	select STM32_HAVE_RNG

config STM32_STM32H7X3XX
	bool
	default n
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM3
	select STM32_HAVE_TIM4
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_TIM12
	select STM32_HAVE_TIM13
	select STM32_HAVE_TIM14
	select STM32_HAVE_TIM15
	select STM32_HAVE_TIM16
	select STM32_HAVE_TIM17
	select STM32_HAVE_LTDC
	select STM32_HAVE_ETHERNET
	select STM32_HAVE_FMC
	select STM32_HAVE_GPIOF if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_GPIOG if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI4
	select STM32_HAVE_SPI5 if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI6
	select STM32_HAVE_RNG

config STM32_STM32H7B3XX
	bool
	default n
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM3
	select STM32_HAVE_TIM4
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_TIM12
	select STM32_HAVE_TIM13
	select STM32_HAVE_TIM14
	select STM32_HAVE_TIM15
	select STM32_HAVE_TIM16
	select STM32_HAVE_TIM17
	select STM32_HAVE_ETHERNET
	select STM32_HAVE_FMC
	select STM32_HAVE_GPIOF if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_GPIOG if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI4
	select STM32_HAVE_SPI5 if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI6
	select STM32_HAVE_RNG

config STM32_STM32H7X5XX
	bool
	default n
	select ARCH_STM32H7_DUALCORE
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	select STM32_HAVE_FDCAN1
	select STM32_HAVE_FDCAN2
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM3
	select STM32_HAVE_TIM4
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_TIM12
	select STM32_HAVE_TIM13
	select STM32_HAVE_TIM14
	select STM32_HAVE_TIM15
	select STM32_HAVE_TIM16
	select STM32_HAVE_TIM17
	select STM32_HAVE_LTDC
	select STM32_HAVE_ETHERNET
	select STM32_HAVE_FMC
	select STM32_HAVE_GPIOF if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_GPIOG if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI4
	select STM32_HAVE_SPI5 if !STM32H7_IO_CONFIG_V
	select STM32_HAVE_SPI6
	select STM32_HAVE_SMPS
	select STM32_HAVE_RNG

config STM32_STM32H7X7XX
	bool
	default n
	select ARCH_STM32H7_DUALCORE
	select ARCH_HAVE_FPU
	select ARCH_HAVE_DPFPU
	select STM32_HAVE_TIM1
	select STM32_HAVE_TIM2
	select STM32_HAVE_TIM3
	select STM32_HAVE_TIM4
	select STM32_HAVE_TIM5
	select STM32_HAVE_TIM6
	select STM32_HAVE_TIM7
	select STM32_HAVE_TIM8
	select STM32_HAVE_TIM12
	select STM32_HAVE_TIM13
	select STM32_HAVE_TIM14
	select STM32_HAVE_TIM15
	select STM32_HAVE_TIM16
	select STM32_HAVE_TIM17
	select STM32_HAVE_LTDC
	select STM32_HAVE_ETHERNET
	select STM32_HAVE_FMC
	select STM32_HAVE_GPIOF
	select STM32_HAVE_GPIOG
	select STM32_HAVE_SPI4
	select STM32_HAVE_SPI5
	select STM32_HAVE_SPI6
	select STM32_HAVE_RNG

# The reduced SRAM configuration STM32H72X and STM32H73X
config STM32_STM32H72XXX_OR_STM32H73XXX
	bool
	default n

config STM32_FLASH_CR_PSIZE
	int "Flash program size width"
	depends on ARCH_CHIP_STM32H7
	default 3
	range 0 3
	---help---
		On some hardware the fastest 64 bit wide flash writes cause too
		high power consumption which may compromise the system stability.
		This option can be used to reduce the program size. The options are:
		0: 8 bits
		1: 16 bits
		2: 32 bits
		3: 64 bits (default)

config STM32_AXI_SRAM_CORRUPTION_WAR
	bool "Errata 2.2.9 Reading from AXI SRAM data read corruption Workaround"
	default y
	---help---
		Enable workaround for Reading from AXI SRAM may lead to data read
		corruption. See ES0392 Rev 6.

		Read data may be corrupted when the following conditions are met:
		- Several read transactions are performed to the AXI SRAM,
		- and a master delays its data acceptance while a new transfer is
		  requested

		This workaround will set the READ_ISS_OVERRIDE bit in the
		AXI_TARG7_FN_MOD register. This will reduce the read issuing capability
		of the SRAM to 1 at AXI interconnect level and avoid data corruption.

if ARCH_STM32H7_DUALCORE

if ARCH_CHIP_STM32H7_CORTEXM7

config STM32_CORTEXM4_ENABLED
	bool "Enable support for M4 core"
	default y

config STM32_CORTEXM7_BOOTM4
	bool "Boot M4 core"
	select STM32_SYSCFG
	default y if STM32_CORTEXM4_ENABLED
	default n

endif # ARCH_CHIP_STM32H7_CORTEXM7

config STM32_CORTEXM7_FLASH_SIZE
	int "Flash reserved for M7 core"
	default 1048576 if STM32_CORTEXM4_ENABLED || ARCH_CHIP_STM32H7_CORTEXM4
	default 2097152

config STM32_CORTEXM7_SHMEM
	bool
	select ARM_MPU if ARCH_CHIP_STM32H7_CORTEXM7
	default y if STM32_CORTEXM4_ENABLED || ARCH_CHIP_STM32H7_CORTEXM4
	default n

config STM32_SHMEM_SRAM3
	bool "Use SRAM3 as shared memory"
	depends on STM32_CORTEXM7_SHMEM
	default y

endif # ARCH_STM32H7_DUALCORE

menu "Application Image Configuration"
choice
	prompt "Application Image Format"
	default STM32_APP_FORMAT_LEGACY
	---help---
		Depending on the chosen 2nd stage bootloader, the application may
		be required to be perform a specific startup routine. Furthermore,
		the image binary must be formatted according to the definition from
		the 2nd stage bootloader.

config STM32_APP_FORMAT_LEGACY
	bool "Legacy format"
	---help---
		This is the legacy application image format.

config STM32_APP_FORMAT_MCUBOOT
	bool "MCUboot-bootable format"
	select STM32_HAVE_OTA_PARTITION
	depends on EXPERIMENTAL
	---help---
		The MCUboot support of loading the firmware images.

comment "MCUboot support depends on CONFIG_EXPERIMENTAL"
	depends on !EXPERIMENTAL

config STM32_APP_FORMAT_NXBOOT
	bool "NuttX nxboot format"
	select STM32_HAVE_OTA_PARTITION
	depends on EXPERIMENTAL
	---help---
		The NuttX nxboot support of loading the firmware images.

comment "nxboot support depends on CONFIG_EXPERIMENTAL"
	depends on !EXPERIMENTAL

endchoice # Application Image Format

endmenu # Application Image Configuration

config STM32_BYPASS_CLOCKCONFIG
	bool "Bypass clock configuration"
	depends on ARCH_STM32H7_DUALCORE
	default n if ARCH_CHIP_STM32H7_CORTEXM7
	default y if ARCH_CHIP_STM32H7_CORTEXM4
	---help---
		Bypass clock configuration. For dual core chips only one core
		should configure clocks

config STM32_SRAM4EXCLUDE
	bool "Exclude SRAM4 from the heap"
	default y if RPTUN
	default n
	---help---
		Exclude SRAM4 from the HEAP in order to use this 64 KB region
		for other uses, such as DMA buffers, etc.

menu "Progmem MTD configuration"

if STM32_HAVE_OTA_PARTITION

comment "Application Image OTA Update support"

config STM32_PROGMEM_OTA_PARTITION
	bool "MTD driver"
	default n
	select BCH
	select MTD
	select MTD_BYTE_WRITE
	select MTD_PARTITION
	select MTD_PROGMEM
	select STM32_PROGMEM
	---help---
		Initialize an MTD driver for the Flash, which will
		add an entry at /dev for application access from userspace.

if STM32_PROGMEM_OTA_PARTITION
config STM32_MCUBOOT_HEADER_SIZE
	hex
	default 0x200
	depends on STM32_APP_FORMAT_MCUBOOT

config STM32_OTA_PRIMARY_SLOT_DEVPATH
	string "Application image primary slot device path"
	default "/dev/ota0"

config STM32_OTA_SECONDARY_SLOT_DEVPATH
	string "Application image secondary slot device path"
	default "/dev/ota1"

config STM32_OTA_TERTIARY_SLOT_DEVPATH
	string "Application image tertiary slot device path"
	default "/dev/ota2"
	depends on STM32_APP_FORMAT_NXBOOT

config STM32_OTA_SCRATCH_DEVPATH
	string "Scratch partition device path"
	default "/dev/otascratch"
	depends on STM32_APP_FORMAT_MCUBOOT

config STM32_OTA_PRIMARY_SLOT_OFFSET
	hex "Application image primary slot offset"
	default "0x40000"

config STM32_OTA_SECONDARY_SLOT_OFFSET
	hex "Application image secondary slot offset"
	default "0xc0000" if STM32_APP_FORMAT_NXBOOT
	default "0x100000"

config STM32_OTA_TERTIARY_SLOT_OFFSET
	hex "Application image tertiary slot offset"
	default "0x140000"
	depends on STM32_APP_FORMAT_NXBOOT

config STM32_OTA_SCRATCH_OFFSET
	hex "MCUboot scratch partition offset"
	default "0x1c0000"
	depends on STM32_APP_FORMAT_MCUBOOT

config STM32_OTA_SLOT_SIZE
	hex "Application image slot size (in bytes)"
	default "0x80000" if STM32_APP_FORMAT_NXBOOT
	default "0xc0000"

config STM32_OTA_SCRATCH_SIZE
	hex "MCUboot scratch partition size (in bytes)"
	default "0x40000"
	depends on STM32_APP_FORMAT_MCUBOOT

endif # STM32_PROGMEM_OTA_PARTITION
endif # STM32_HAVE_OTA_PARTITION

endmenu # Progmem configuration

endif # ARCH_CHIP_STM32H7
